The present application relates to an antifuse structure and a method of forming the same. More particularly, the present application relates to an antifuse structure having enhanced programming efficiency and a method of forming the same.
Antifuse structures have been used in the semiconductor industry for memory related applications including, for example, field programmable gate arrays and programmable read-only memories. Prior art antifuse structures include a continuous layer of an antifuse material that is sandwiched between two disconnected conductive materials (i.e., a top electrode and a bottom electrode). The antifuse material initially has a high resistance, but it can be converted into a lower resistance by the application of a certain process. For example, and after high voltage programming, the antifuse structure/circuit becomes conductive/open through a dielectric breakdown phenomenon.
In such prior art antifuse structures, programming efficiency is a concern due to the large contact area that exists between the layer of antifuse material and the two electrodes. There is a need for providing an anitfuse structure in which the contact area between the antifuse material and the two electrodes is reduced which, in turn, can lead to improved programming efficiency.